Hierarchy of the Status Registers
The Figure "Graphical overview of the status registers hierarchy" shows the hierarchical structure of information in the status registers (ascending from left to right).

Graphical overview of the status registers hierarchy
OPER = Operation Status Summary Bit
RQS/MSS = Service Request Generation
ESB = Standard Event Status Summary Bit
MAV = Message Available in Output Queue
QUES = Questionable Status Summary Bit
2 = Error- /Event-Queue
1, 0 = not used
Note: This legend explains the abbreviations to the Status Byte Register.
The R&S SMC uses the following status registers:
- Status Byte (STB) and Service Request Enable (SRE), see "Status Byte (STB) and Service Request Enable Register (SRE)".
- Standard Event Status, i.e. the Event status Register (ESR) and the Event Status Enable (ESE), see "Event Status Register (ESR) and Event Status Enable Register (ESE)".
- Questionable Status and Operation Status, the (SCPI status registers, see "Structure of a SCPI Status Register", "Questionable Status Register (STATus:QUEStionable)" and "Operation Status Register (STATus:OPERation)".
- Output-Queue
The output queue contains the messages the instrument returns to the controller. It is not part of the status reporting system but determines the value of the MAV bit in the STB and thus is represented in the overview. - Error- /Event-Queue
The error-/event-queue contains all errors and events that have occurred in the past. When reading the queue, the instrument starts with the first occurred error/event.
All status registers have the same internal structure.
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