Activates the addition of the DC offset to both clock synthesis output signals. The DC offset value is set with command CSYNthesis:OFFSet.
Parameters: | ||||
<State> |
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Example: | CSYN:OFFS 0.4V sets a DC offset of 0.4V CSYN:OFFS:STAT ONadds a DC offset of 0.4V to the clock signal | |||
Manual operation: | See "State DC Offset - Clock Synthesis" |
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